Design of Experiments (DoE) Workflow with Focus on Wafer Uniformity in Semiconductor Industries

DoE is a tool to create quantitative process models with a very limited number of runs (far below full factorials designs) but using these runs in such an effective way that the uncertainty about the model is shortened considerably compared to often used methods like a one factor at a time strategy. A contact hole etching example (semiconductor) is used. Contact holes are used to get conductive connections between different layers of complex semiconductor applications which are electrically separated by an isolation layer.

After the position of the holes is fixed by lithographic methods, the etching process will remove the extra layer at these positions by plasma etching: reactive gases flow through the etching chamber, a plasma is created by a radio frequency power source while maintaining low pressure.